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Projecte llegit

Títol: Firmware Engineering for Enhanced Reliability and Performance in the 3Cat-8 CubeSat

Estudiants que han llegit aquest projecte:

Director/a: PARK, HYUK

Departament: FIS

Títol: Firmware Engineering for Enhanced Reliability and Performance in the 3Cat-8 CubeSat

Data inici oferta: 06-02-2024     Data finalització oferta: 06-10-2024


Estudis d'assignació del projecte:
    DG ENG AERO/TELEMÀT
Tipus: Individual
 
Lloc de realització: EETAC
 
Nom del segon director/a (UPC): Adriano Camps, Luis Contreras
Departament 2n director/a:
 
Paraules clau:
CubeSat, NanoSat, onboard computer
 
Descripció del contingut i pla d'activitats:
- Objectives
- In recent years, small satellites for Earth Observation and communications have become a preferred cost-effective solution for private companies and research institutions. 3Cat-8 is a 6U CubeSat mission, the most recent one from the UPC NanoSatLab, and it has two main objectives. As a scientific mission, it aims to characterize ionospheric effects on the propagation of radiofrequency signals by means of GNSS Radio Occultations (GNSS-RO), GNSS Reflectometry (GNSS-R), and multi-spectral imaging of the auroral emissions. As a Technology Demonstration test-bed, it carries several novel systems onboard, including a deployable Fresnel Zone Plate Antenna, and a two-stage deployment system for Pocketqubes. This thesis investigates the critical role of firmware in the on-board computer (OBC) of Cubesats, addressing the need for robust and efficient software solutions to ensure mission success. Cubesats, as miniature satellites with limited resources, demand highly optimized firmware to maximize performance and reliability within the constraints of size, weight, and power.
- Methodology
The research employs a comprehensive approach, encompassing firmware design, implementation,
testing, and performance analysis. The implementation phase involves the development of a prototype firmware for a representative Cubesat OBC, incorporating innovative features to enhance data processing capabilities, and optimize power consumption. Rigorous testing methodologies are employed, including simulation environments and hardware-in-the-loop setups, to validate the proposed firmware's performance under various operating conditions. Furthermore, the thesis explores the integration of autonomous decision-making algorithms into the firmware, empowering Cubesats to dynamically respond to mission-specific events and optimize resource utilization.
- Expected Results
The anticipated outcomes of this thesis encompass a well-structured firmware development process adhering to the JPL Flight Software Coding standards and testing protocols. The approach is designed to meticulously address the specific requirements of the subsystems within the satellite.
 
Overview (resum en anglès):
The objective of this bachelor's thesis is to design and implement the flight software that
runs in the On-Board Computer (OBC) of the ³Cat-8 satellite mission in a collaboration with
UPC NanoSat Lab. The OBC is the heart of the satellite and the one that connects and
manages all the other subsystems and the software that runs on it is the one in charge of
gathering all the information of the experiments carried on by the payloads of the satellite
and also the one in charge of managing the status of the satellite.
This thesis includes the whole definition of the development environment of the application
code, which is developed in C language, over a FreeRTOS (Real Time Operating system).
It also includes the design of the multi-threading environment and architecture design of
the software and the safety-critical development approach that has to be taken in this kind
of embedded software applications.

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